Published by Gbaf News
Posted on July 3, 2018
5 min readLast updated: January 21, 2026
Sonics, Inc., the world’s foremost supplier of on-chip network (NoC) and power management technologies and services, announced a partnership with SiFive, the leading provider of market-ready processor core IP based on the RISC-V instruction set architecture. Sonics and SiFive are enabling an agile RISC-V design platform for systems-on-chip (SoC) by making the Sonics’ NoCs interoperable with SiFive’s family of RISC-V Core IP.
Sonics’ NoCs are the IP industry’s most widely adopted commercial interconnect fabric and have been shipped in billions of SoCs over the past 20 years. SiFive’s Core IPs are the most widely deployed RISC-V CPUs in the world and are the lowest risk, easiest path to RISC-V.
The partnership aims to accelerate SoC integration and time-to-market with highest performance and lowest power consumption for a number of target markets and applications including IoT, mobile, storage, and machine learning/AI. With over 100 member organizations and a robust software ecosystem, RISC-V is positioned to become the standard architecture for modern computing devices, from 32-bit embedded microcontrollers to 64-bit application processors and datacenter accelerators.
Working together, SiFive and Sonics are demonstrating optimized integration between the SiFive E Series CPUs and Sonics’ flagship SonicsGN® on-chip network. Interfacing directly to the native TileLink interfaces on the CPU saves area, latency, and power versus bridging to legacy interfaces. Additionally, since both companies deliver their IP through highly flexible generation technology, the joint solution will immediately adapt to new interface choices, ensuring continued interoperability.
“SiFive’s founders invented the RISC-V instruction set architecture, which puts them in the driver’s seat for customers who want the benefits that open source hardware development offers,” said Drew Wingard, CTO of Sonics. “Our NoCs are the most trusted and proven interconnect products in the market and we have been a strong proponent of agile, platform-based SoC design for many years. Pairing SiFive’s CPU cores with our NoCs gives chip designers a RISC-V platform solution they can trust to rapidly integrate SoCs.”
“Sonics has a history of SoC design success and its NoCs provide the integration flexibility and performance our mutual customers need to create leading edge designs,” said Yunsup Lee, co-founder and CTO of SiFive. “We are excited to work with Sonics to deliver an agile RISC-V platform that eases chip integration with uncompromising performance and power. SoC designers who adopt this platform can optimize their designs to meet demanding requirements, while speeding the development process from specification through system integration.”
For more information about the Sonics-SiFive partnership, contact your company representative.
Sonics, Inc., the world’s foremost supplier of on-chip network (NoC) and power management technologies and services, announced a partnership with SiFive, the leading provider of market-ready processor core IP based on the RISC-V instruction set architecture. Sonics and SiFive are enabling an agile RISC-V design platform for systems-on-chip (SoC) by making the Sonics’ NoCs interoperable with SiFive’s family of RISC-V Core IP.
Sonics’ NoCs are the IP industry’s most widely adopted commercial interconnect fabric and have been shipped in billions of SoCs over the past 20 years. SiFive’s Core IPs are the most widely deployed RISC-V CPUs in the world and are the lowest risk, easiest path to RISC-V.
The partnership aims to accelerate SoC integration and time-to-market with highest performance and lowest power consumption for a number of target markets and applications including IoT, mobile, storage, and machine learning/AI. With over 100 member organizations and a robust software ecosystem, RISC-V is positioned to become the standard architecture for modern computing devices, from 32-bit embedded microcontrollers to 64-bit application processors and datacenter accelerators.
Working together, SiFive and Sonics are demonstrating optimized integration between the SiFive E Series CPUs and Sonics’ flagship SonicsGN® on-chip network. Interfacing directly to the native TileLink interfaces on the CPU saves area, latency, and power versus bridging to legacy interfaces. Additionally, since both companies deliver their IP through highly flexible generation technology, the joint solution will immediately adapt to new interface choices, ensuring continued interoperability.
“SiFive’s founders invented the RISC-V instruction set architecture, which puts them in the driver’s seat for customers who want the benefits that open source hardware development offers,” said Drew Wingard, CTO of Sonics. “Our NoCs are the most trusted and proven interconnect products in the market and we have been a strong proponent of agile, platform-based SoC design for many years. Pairing SiFive’s CPU cores with our NoCs gives chip designers a RISC-V platform solution they can trust to rapidly integrate SoCs.”
“Sonics has a history of SoC design success and its NoCs provide the integration flexibility and performance our mutual customers need to create leading edge designs,” said Yunsup Lee, co-founder and CTO of SiFive. “We are excited to work with Sonics to deliver an agile RISC-V platform that eases chip integration with uncompromising performance and power. SoC designers who adopt this platform can optimize their designs to meet demanding requirements, while speeding the development process from specification through system integration.”
For more information about the Sonics-SiFive partnership, contact your company representative.
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